Translate the page number, retain the offset
A paged address separates a virtual page number from an offset. Translation supplies the corresponding physical frame number and retains the offset, allowing adjacent virtual pages to occupy nonadjacent frames.
With 4 KiB pages, for example, twelve bits identify the within-page position. This illustrates the decomposition rather than imposing a universal page size; formats depend on architecture and paging mode.
References: [1]
Entries also carry protection and state
Entries commonly contain more than an address, including validity, residency, permissions, or access and modification state. Encodings vary, and the operating system may require additional records to interpret a fault.
Separate address spaces can map the same virtual number to different contents. Deliberate sharing can also map a frame into several spaces, with permissions and sharing rules determining permitted access.
Multilevel structures avoid empty regions
A linear table reserves an entry for every possible virtual page and can waste space in sparse address spaces. Multilevel tables omit lower-level table pages for wholly unused regions.
The saving adds lookup work: a translation-cache miss can require several levels of traversal. TLB caching reduces repeated walks. Table design therefore trades space, allocation complexity, and lookup cost rather than minimizing bytes alone.